Lead: On July 10th, according to scitechdaily, a Chinese research team consisting of institutions such as Huazhong University of Science and Technology, Shanghai Jiao Tong University, University of Electronic Science and Technology of China, and Nankai University has successfully developed the world’s first programmable single-chip All-Optical Signal Processing (AOSP) chip. It supports optical filtering, signal regeneration, and logical operations, breaking the limitation of traditional silicon photonics that require “optical-electrical-optical (O-E-O)” conversion. This allows data to remain in an optical signal state from input to output, moving towards a new high-speed computing architecture without the need for switches.
On July 10th, according to scitechdaily, a Chinese research team composed of Huazhong University of Science and Technology, Shanghai Jiao Tong University, University of Electronic Science and Technology of China, and Nankai University has recently successfully developed the world’s first programmable single-chip All-Optical Signal Processing (AOSP) chip. It can support optical filtering, signal regeneration, and logical operations, breaking the restriction that traditional silicon photonics require “optical-electrical-optical (O-E-O)” conversion. This enables data to maintain an optical signal state throughout the process from input to output, moving towards a new high-speed computing architecture that does not require switches.
The New Optical Chip Enables Ultra-High-Speed Computing and Data Processing
The rise of the big data era has brought significant challenges to information processing, especially in handling massive amounts of data and controlling energy consumption. Currently, more than 90% of data is transmitted via light waves, while actual data processing still mainly occurs in the electric field, which further exacerbates these problems. To address this mismatch, two main approaches have emerged. One is to convert signals from optical to electrical and then back (referred to as “O-E-O” conversion); the other focuses on processing data entirely within the optical domain, known as All-Optical Signal Processing (AOSP).
Although O-E-O conversion faces numerous limitations, including those related to transparency and challenges in achieving parallelism using optoelectronic components, AOSP offers a more scalable alternative. By employing appropriate nonlinear processes, AOSP can enhance system performance in terms of complexity, cost, and energy efficiency. Interest in AOSP dates back to the 1980s when initial explorations were conducted using bulk nonlinear devices. However, breakthroughs in the field of photonic integration in recent years have significantly accelerated its development.
Among various integration platforms, silicon-based photonics technology has emerged as one of the most promising to drive the advancement of AOSP technology. Silicon photonics supports multiple functions that are closely related to modern optical network architectures. To meet future demands, optical networks must possess 3T (format transparency, wavelength transparency, bandwidth transparency), 3M (multifunctional, multichannel, multi-network), and 3S (self-sensing, self-learning, self-adaptive) capabilities. Therefore, achieving a high degree of reconfigurability and adaptability is crucial for future optical networks and the wider application of AOSP in ultra-large-capacity systems.
Breakthroughs in the Development of Programmable AOSP Chips
A research team led by Professor Zhang Xinliang (transliterated) from Huazhong University of Science and Technology, Professor Su Yikai (transliterated) from Shanghai Jiao Tong University, Professor Qiu Kun (transliterated) from University of Electronic Science and Technology of China, and Academician Zhu Ninghua (transliterated) from Nankai University has successfully developed a monolithically integrated programmable all-optical signal processing (AOSP) chip. This chip supports key functions such as optical filtering, signal regeneration, and logical operations. The project originated from a national-level initiative aimed at developing silicon-based reconfigurable AOSP technology.
By leveraging the core advantages of silicon photonics, such as CMOS compatibility, minimal signal loss, compact form factor, and strong optical nonlinearity, the researchers have produced a chip that meets the stringent requirements of next-generation optical networks.
These include high-speed data transmission, compatibility with advanced modulation formats, and support for wavelength-transparent operations. The team has experimentally verified the chip’s ability to perform dynamic filtering, logical computing, and signal regeneration, laying a solid foundation for its use in cutting-edge applications such as optical communication, advanced computing, imaging, and sensing.
Overcoming the Limitations of Silicon Photonics
There are several technical obstacles in developing a programmable all-optical signal processing (AOSP) platform based on silicon-on-insulator (SOI) technology. A major issue is that silicon exhibits carrier-related effects, particularly two-photon absorption (TPA) and free-carrier absorption (FCA), which limit the amount of power available for nonlinear interactions, thereby weakening these effects. Additionally, the high refractive index contrast in silicon leads to tight confinement of the optical field, which increases scattering losses, complicates precise control of light propagation, and introduces significant optical and thermal crosstalk.
To overcome these limitations, the researchers have introduced improved manufacturing methods, innovative device structures, and new materials. One key advancement involves the development of ultra-low-loss silicon waveguides and high-quality microresonators through enhanced manufacturing techniques. These components support integrated photonic filters with wide, reconfigurable bandwidths and tunable free spectral ranges, allowing for highly flexible and precise manipulation of input optical signals.
Meanwhile, new design strategies have been implemented to enhance nonlinear optical performance. These include structures such as ridge waveguides with reverse-biased PIN junctions, slot waveguides, multimode waveguides, and parity-time symmetric coupled microresonators. These configurations enable a range of complex AOSP functions. For example, 100 Gbit/s logical operations have been achieved using a custom-designed single-chip programmable optical logic array. The platform also supports high-dimensional multivalued logic processing based on four-wave mixing. Furthermore, efficient silicon PIN waveguides have enabled robust multichannel amplitude and phase regeneration across various signal formats, demonstrating the potential for spatial scaling of regeneration capacity.
To address the challenges of optical and thermal interference in densely integrated systems, the team has developed advanced optical layouts and packaging technologies. These innovations support compact, multifunctional, and low-energy-consuming chips. As a result, four different programmable AOSP chips have been realized: reconfigurable photonic filter chips, logic processing chips, multidimensional regeneration chips, and packaged multichannel multifunctional AOSP chips.
Chip Performance Indicators and Future Outlook
This research highlights key progress in the development of programmable AOSP chips. Through structural and material innovations, critical challenges in building large-scale integrated AOSP photonic chips have been addressed, such as high transmission losses, weak nonlinear effects, limited optical field control, and severe optical, electrical, and thermal crosstalk. Ultra-low-loss silicon waveguides have losses as low as 0.17 dB/cm and Q factors as high as 2.1106.
The research team has achieved advanced integrated filters with bandwidths tunable from 0.55 pm to 648.72 pm (i.e., over three orders of magnitude) and FSR tunable from 0.06 nm to 1.86 nm (30 times). Absolute FWM conversion efficiency has been demonstrated to be as high as 12 dB, which is crucial for ensuring the success of high-performance logic and regeneration operations.
Eight-channel multifunctional single-chip integration of filtering, logic, and regeneration has been achieved, with 136 devices integrated on a single chip (including filters, logic gates, regenerators, gratings, MMIs, electrodes, etc.). The total signal processing capacity has been shown to be up to 800 Gb/s (with each channel operating at 100 Gb/s), adaptable to various modulation formats including DPSK and OOK. A complete set of CLUs has been generated for logical operations, and QPSK regeneration has been shown to improve receiver sensitivity by more than 6 dB. Chip-level routing and processing of multichannel signals have been verified using advanced optoelectronic packaging technologies.
Due to the inherently ultra-fast nature of optical Kerr nonlinearity (on a femtosecond timescale), these efforts lay the foundation for the design and fabrication of faster large-scale silicon-based AOSP chips. Looking ahead, improvements in nanomanufacturing technologies, new materials, and packaging processes are expected to further enhance the performance and flexibility of AOSP chips, providing more efficient optical solutions for high-speed communication and advanced computing. Optical components on chips will move from being supporting roles in the past to leading roles. If future logical operations, data routing, and even memory access can all be performed in the optical domain, whether switches are still necessary components will undoubtedly become a focus of industry discussions.
